1. Field of the Invention
The present invention relates to a semiconductor device and a wire bonding apparatus and, more particularly, to a semiconductor device fabricated by interconnecting inner leads and bonding pads formed on a surface of a chip at a level above that of the surfaces of the inner leads, and a wire bonding apparatus for use for fabricating such a semiconductor device.
2. Background Art
There has been demand for producing inexpensive, stable semiconductor devices by enhancing the efficiency of development of chips for fabricating semiconductor devices.
A chip included in a semiconductor device is provided internally with an integrated circuit, and a plurality of bonding pads formed on a surface of the chip. Electric signals are exchanged through the bonding pads between the internal integrated circuit of the chip and an external circuit.
When fabricating a semiconductor device, a chip provided with bonding pads is mounted on a die pad (island) formed in a leadframe provided with a plurality of inner leads arranged around the die pad and respectively corresponding to the bonding pads.
A wire bonding apparatus interconnects the plurality of inner leads and the plurality of bonding pads electrically with bonding wires (metal loops).
After the interconnection of the bonding pads and the inner leads by the wire bonding apparatus has been completed, the chip, the inner leads and the bonding wires are sealed in a resin package.
Such a conventional semiconductor device as mentioned above is subject to a restriction requiring the arrangement of the bonding pads in a peripheral area of a surface of the chip. Therefore, it has been difficult to improve the efficiency of developing semiconductor devices greatly.
More specifically, it is possible that the internal circuit of the chip is shorted if the bonding wire touches the chip. Therefore, the bonding pads are not arranged in a central area of the surface of the chip and are arranged in a peripheral area of the surface of the chip. Such a restriction on the arrangement of the bonding pads places restrictions on the layout of the internal circuit of the chip; that is the layout of the internal circuit must be determined so as to adjust to the arrangement of the bonding pads in the peripheral area of the surface of the chip.
The present invention has been made to solve such a problem and it is therefore an object of the present invention to provide a semiconductor device having a high degree of freedom of designing the layout of its internal circuit and capable of being developed at high efficiency.
According to one aspect of the present invention, a semiconductor device comprises a chip; a plurality of bonding pads provided on the chip; and a plurality of inner leads arranged opposite to the bonding pads. Further the semiconductor device comprises a plurality of bonding wires electrically connecting the bonding pads and the corresponding inner leads, respectively. Each of the bonding wires has a plurality of bends electrically isolated from conductive parts on the chip, and the bonding pads are arranged at optional positions on a surface of the chip.
According to another aspect of the present invention, a wire bonding apparatus is used for fabricating the above semiconductor device.
According to another aspect of the present invention, a wire bonding apparatus for electrically interconnecting a plurality of bonding pads arranged on a chip, and a plurality of inner leads arranged on a leadframe by bonding wires, is configured to set respective ratios of distances between the bonding pad and bends to be formed in each bonding wire to an overall length of the bonding wire between the bonding pad and the inner lead as viewed from above a major surface of the chip. Further the wire bonding apparatus is configured to form the plurality of bends electrically insulated from conductive parts on the chip at positions corresponding to the ratios.
Other and further objects, features and advantages of the invention will appear more fully from the following description.